1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
|
// c64.c
//
// 20060803 Markku Alén
#include "c64.h"
#include "cpu.h"
#include "mem.h"
#include "sid.h"
#include "cia.h"
#include "tape.h"
unsigned int total_cycles;
static cia_t cia1;
static int on_chip_port_pins;
static int on_chip_port_input;
static int on_chip_port_output;
static int on_chip_port_direction;
#define UPDATE_ON_CHIP_PORT_PINS() (on_chip_port_pins = (on_chip_port_output & on_chip_port_direction) | (on_chip_port_input & ~on_chip_port_direction))
static int page_read(int address)
{
switch(address & 0xffff)
{
case 0x0000:
return on_chip_port_direction;
case 0x0001:
return on_chip_port_output;
default:
return ram[address & 0xffff];
}
}
static void page_write(int address, int data)
{
switch(address & 0xffff)
{
case 0x0000:
on_chip_port_direction = data;
UPDATE_ON_CHIP_PORT_PINS();
break;
case 0x0001:
on_chip_port_output = data;
UPDATE_ON_CHIP_PORT_PINS();
break;
default:
ram[address & 0xffff] = data;
}
}
static int io_read(int address)
{
switch(address & 0x0c00)
{
case 0x0000:
return 0;
case 0x0400:
return sid_read(address);
case 0x0800:
return color[address % sizeof(color)];
default:
switch(address & 0x0300)
{
case 0x0000:
return cia_read(&cia1, address);
case 0x0100:
return 0;
default:
return 0x00;
}
}
}
static void io_write(int address, int data)
{
switch(address & 0x0c00)
{
case 0x0000:
break;
case 0x0400:
sid_write(address, data);
break;
case 0x0800:
color[address % sizeof(color)] = data;
break;
default:
switch(address & 0x0300)
{
case 0x0000:
cia_write(&cia1, address, data);
if((address & 0x000f) == 0x00)
cia_port_b_input(&cia1, kbd_data(cia_a_port_output(&cia1)));
break;
case 0x0100:
break;
}
}
}
static int cpu_read(int address)
{
switch(address & 0xf000)
{
case 0xa000:
case 0xb000:
switch(on_chip_port_pins & 0x07)
{
case 0x03:
case 0x07:
return basic[address % sizeof(basic)];
default:
return page_read(address);
}
break;
case 0xd000:
switch(on_chip_port_pins & 0x07)
{
case 0x01:
case 0x02:
case 0x03:
return chars[address % sizeof(chars)];
case 0x05:
case 0x06:
case 0x07:
return io_read(address);
default:
return page_read(address);
}
break;
case 0xe000:
case 0xf000:
switch(on_chip_port_pins & 0x07)
{
case 0x02:
case 0x03:
case 0x06:
case 0x07:
return kernel[address % sizeof(kernel)];
default:
return page_read(address);
}
break;
default:
return page_read(address);
}
}
static void cpu_write(int address, int data)
{
switch(address & 0xf000)
{
case 0xd000:
switch(on_chip_port_pins & 0x07)
{
case 0x05:
case 0x06:
case 0x07:
io_write(address, data);
break;
default:
page_write(address, data);
}
break;
default:
page_write(address, data);
}
}
static void cpu_jam(int address, int op_code)
{
reset_cpu();
}
void c64_init(void)
{
total_cycles = 0;
on_chip_port_input = 0xff;
on_chip_port_output = 0x00;
on_chip_port_direction = 0x00;
UPDATE_ON_CHIP_PORT_PINS();
kbd_init();
sid_init();
cia_init(&cia1);
init_cpu(cpu_read, cpu_write, page_read, page_write, cpu_jam);
init_tape();
reset_cpu();
}
void c64_run(unsigned int cycle_count)
{
unsigned int elapsed_cycles;
for(;;)
{
elapsed_cycles = cycles;
exec_cpu();
elapsed_cycles = cycles - elapsed_cycles;
if(cycle_count <= elapsed_cycles)
break;
cycle_count -= elapsed_cycles;
total_cycles += elapsed_cycles;
cia_exec(&cia1, elapsed_cycles);
if(cia1.irq_pin)
raise_irq();
}
}
|
